Index Index
ampere, A, Paragraphs
AND, OR, NOT operations, Paragraph
anode terminal, Paragraph
assert, Paragraph
asynchronous, Paragraph
asynchronous communication, Paragraph
binary, Paragraph
code, Paragraph
vector, Paragraph
bipolar (TTL), Paragraphs
bit, Paragraph
least significant, Paragraph
most significant, Paragraph
vector, Paragraph
Boolean algebra, Paragraphs
rules, Table
breadboard, Paragraph
case statement (VHDL), Listing
cathode terminal, Paragraph
CLB, Paragraph
combinational logic, Paragraph
combinational loop, Paragraph
Computer aided design (CAD), Paragraph
concurrency, Paragraph
configurable logic block, FPGA. See CLB
constraints file, FPGA, Paragraph
control bit, Paragraph
decade, Paragraphs
current, Paragraphs
data bit, Paragraph
decoder
one-hot, Paragraph
delay
propagation, Paragraph
wire, Paragraph
worst case, Paragraph
DeMorgan equivalent, Paragraphs
DeMorgan’s Rules, Paragraph
deserializer, Paragraph
device under test (DUT), Paragraph
driver, Paragraph
duty cycle, Paragraph
EDA Playground, Paragraph
edge
falling, or negative, Paragraph
rising, or positive, Paragraph
Electronic design automation (EDA), Paragraph
entity (VHDL), Paragraph
enumerated type, Item
event, Paragraph
falling edge. See edge
fan-in, Paragraph
fan-out, Item
field programmable gate array. See FPGA
flip-flop, Listing
forward voltage, of LED, Item
FPGA, Paragraph
FPGA development board, Paragraph
frame rate, Paragraph
ground, Paragraph
Hardware description language (HDL), Paragraph
hexadecimal, Paragraphs
High level synthesis (HLS), Paragraph
ieee.math_real package, Paragraph
ieee.numeric_std library, Item
if-then-else (VHDL), Paragraph
implicant, Item
essential prime, Item
prime, Item
implied memory, Paragraph
integrated circuit (IC), Paragraph
interface, Paragraph
inverter (NOT gate), Paragraph
latch, Paragraph
LED, light emitting diode, Paragraph
load, Paragraphs
logic
circuit, Paragraph
diagram, Paragraph
equation, Paragraph
gate, Paragraph
minimization, Paragraph
synthesis, Paragraph
logic slice, FPGA, Paragraph
logical adjacency, Paragraphs
logical statement, Paragraph
lookup table. See LUT
lsb (least significant bit), Paragraph
LUT, Paragraph
minterm, Item
msb (most significant bit), Paragraph
multimeter, Figure
multiple driver error, Paragraph
multiplexer, Paragraph
parameter, of a VHDL model, Paragraph
pixel, Paragraph
port, Paragraph
positive current convention, Paragraphs
positive edge. See edge
power, watts (W), Paragraph
powers of two, Figure
priority encoder, Checkpoint Paragraph
product term, Paragraph
programmable logic, Paragraph
propagation delay. See delay
prototype, Paragraph
reference designator (REFDES), Paragraph
register, Listing
register transfer, Paragraph
register transfer level (RTL), Paragraph
resistance, Paragraphs
rising edge. See edge
scalability, Paragraph
serial peripheral interface
see SPI bus, Paragraph
serializer, Paragraph
shift register, Paragraph
SPI bus, Paragraph
start and stop bits, Paragraph
structural VHDL, Paragraph
subsystem, Paragraph
sum of products, SOP, Paragraph
synchronous, Paragraph
synchronous communication, Paragraph
\(t_{PLH}, t_{PHL}\), Paragraph
\(t_{d}, t_{p}, t_{pd}\), Paragraph
testbench, Paragraph
2-to-1 multiplexer, Listing
2-to-4 one-hot decoder, Listing
toggle flip-flop (T-flop), Paragraph
transistor, pMOS and nMOS, Figure
truth table, Paragraph
TTL, Paragraphs
\(V_{IL}, V_{IH}, V_{OL}, V_{OH}\), Paragraphs
Verilog, Paragraph
VGA graphics, Paragraph
VHDL, Paragraph
VHDL model
clock divider, Listing
counter with clear and enable, Listing
counter with preload, Listing
Counter with terminal count output, Listing
Enabled multiplexer, Listing
flip-flop, Listing
flip-flop with enable, Listing
flip-flop with synchronous reset, Listing
flip-flop with synchronous reset, enable, Listing
integer counter, Listing
Multiplexer, using if-then-else, Listing
parallel-load register, Listing
phase accumulator, Listing
seven-segment decoder, Listing
voltage, Paragraph
divider, Paragraphs
drop, Paragraph
voltage divider, Figure
volts (V), Paragraph
