Section 5.1 Preview of (more) modern logic design
Recall, from Section 1.6, the four steps in prototyping a digital system:
- Capture: Expressing the desired system behavior, e.g., in a truth table and logic equations.
- Synthesis: Translating the captured design to a logic diagram and/or a list of required components and a netlist.
- Implementation: Placing components in a physical layout and routing the connections specified in the netlist.
- Testing: Verifying that the prototype functions as intended.
We are now going to up the sophistication of our design approach with computer-aided design (CAD), also called electronic design automation (EDA). EDA tools take advantage of computing power to enable designers to do three things better:
- We can capture more sophisticated designs at a higher level of abstraction than truth tables and logic equations.
- We can test a design before implementing it, through logic simulation.
- We can synthesize and implement larger designs with programmable hardware, rather than hand wiring a breadboard with discrete components.
Early EDA tools enabled designers to perform schematic capture, drawing their logic diagrams on a computer screen. The tools would then translate the schematic into an internal representation that could be analyzed for consistency (e.g., making sure that two outputs aren’t connected together), simulated (is the design logically correct, does it meet timing requirements), and then translated into a printed circuit layout for fabrication. In the early 1980s, design capture through hardware description language (HDL) was introduced. A hardware description language looks like an ordinary programming language, but it contains features designed to model hardware that operates in real time. Two of these early HDLs, VHDL and Verilog, have continued, with periodic updates, to the present day, and are the most commonly used in universities and industry. More sophisticated HDLs, including so-called high level synthesis (HLS) methods that convert C code into hardware prototypes, are evolving rapidly and may supplant VHDL and Verilog in the future.
As with most arguments about programming languages (C? C++? Java? Python? ...), VHDL and Verilog each have their passionate fans and detractors. Each language has advantages and disadvantages relative to the other, and industry sectors that prefer one over the other. My opinion is that VHDL is easier to learn than Verilog (though of course there are people who believe the opposite). And, because I’m the boss in this course, we’re going to use VHDL.
