Chapter 3 Efficient Logic
In Section 1.3 and Section 1.4 we saw how truth tables and logic equations are used to capture the behavior of a digital design, and then, in Section 1.5, how the equations are translated into logic diagrams for gate-level implementation. Chapter 2 described logic gate circuits and their important electrical characteristics: input and output voltages and currents, propagation delay, and power consumption.
It is, of course, of primary importance that a design be logically correct and perform the function it is designed to do. Following closely behind are three very practical specifications:
- Speed: Does the system perform its functions in an acceptable amount of time?
- Power: Does the system consume an acceptable amount of power?
- Size: Does the system fit into a package of acceptable size?
Your phone, for example, must be very fast in order to do things like stream video, it must be powered by a battery and give off very little waste heat, and it must be small enough to fit into your pocket. Speed, power, and size are not independent. Higher speeds tend to require more power. On the other hand, simpler circuits require fewer transistors and less wiring, reducing size and increasing speed. Making the tranistors themselves smaller increases speed and enables more functionality to be packed into a smaller space.
This chapter focuses on efficient gate-level design: how to go from truth table to logic equation to the simplest possible logic diagram. We will see two methods for "by-hand" logic minimization based on Boolean algebra. Modern EDA tools, based on the same principles, automate logic minimization for complex designs.
