Section 11.4 Logic implementation on FPGAs
After synthesis, we know what resources (LUTs and flip-flops) we will need and how they will be connected. The task of the implementation step is to choose particular LUTs and flip-flops from the thousands available on the target FPGA, (the “place” step), and then to select the wiring paths between them and from ports to pins, following the XDC file (the “route” step). Placing and routing is frequently an iterative process, to keep the routes short while avoiding congestion (running out of “lanes” on the highway).
Following place-and-route, the designer can see the final netlist in the form of a schematic. For the four-bit counter, the post-implementation schematic looks the same as the post-synthesis schematic, Figure 11.3.2, and is omitted here.
The very last implementation step is to incorporate the programming for the LUTs, the switch settings for the routing, and other settings, into a binary file called a bitstream that is loaded into the FPGA to accomplish the configuration of the device.
